Manufacturing

ICsprout55 dual-tensor 32+32

CF-12: Thirty-Two-Row Dual-Tensor On 700 µm

Largest bounded layer-0 primitive so far: dual-tensor dual-MAC at full thirty-two-row scale. STA closes at 60 MHz.

Key points

1024 dual-port bank modules (512 per tensor).

All 64 slots pass RTL known-answer tests.

Completes dual-tensor ladder at thirty-two-row scale.

Tensors

in_proj + out_proj

32 rows each; CF-10 + CF-9 indices.

Die

700×700 µm

500×500 placement failed (GPL-0302).

Cells

~116k mapped

261,695 instances after tap/CTS/fill.

DRT

0 violations

Clean first route.

Timing (exp.)

60 MHz

Placement-RC sweep.

What CF-12 proves

CF-12 is the thirty-two-row counterpart to CF-11: both in_proj and out_proj dual-MAC bundles on one experimental tile with honest model_primitive scope.

Variant: linear_attn_dual_tensor_thirty_two_row.

Mapped residency over 1024 bank modules.

STA closes at 60 MHz under placement RC.

Honest boundaries

Still sixty-four pinned rows across two tensors — not full layer-0 on chip.

Run scripts/verify_cf12_gate.sh when tmp/ artifacts exist.

Transfer cf12_handoff_package.zip for ECC rtl2gds.

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