Manufacturing

ICsprout55 dual-tensor layer-0

CF-11: in_proj + out_proj Dual-MAC On One Tile

First bounded dual-tensor layer-0 primitive: shared 32-lane MAC, tensor-dependent dot cycles (32 vs 64). STA closes at 70 MHz.

Key points

512 dual-port bank modules across two weight planes.

All 32 slots pass RTL KAT (16 in_proj + 16 out_proj).

Completes bounded layer-0 linear_attn projection pair on one chip.

Tensors

in_proj + out_proj

16 rows each; same indices as CF-5/CF-7.

MAC

32 lanes shared

tensor_sel chooses weight plane.

Cells

~72k mapped

160,190 instances after tap/CTS/fill.

DRT

0 violations

500×500 µm die at density 0.50.

Timing (exp.)

70 MHz

Placement-RC sweep on repaired DEF.

What CF-11 proves

CF-11 shows both closed tensor chains (in_proj and out_proj) can coexist on one ICsprout55 tile without claiming full layer-0 or full-model residency.

Variant: linear_attn_dual_tensor_sixteen_row.

Mapped residency over 512 dual-port bank modules.

STA closes at 70 MHz under placement RC.

Honest boundaries

Still thirty-two pinned rows across two tensors — not full layer-0 weights on chip.

Run scripts/verify_cf11_gate.sh when tmp/ artifacts exist.

Transfer cf11_handoff_package.zip for ECC rtl2gds.

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